Replacement LCD Display for DOT Matrix
For DMD screens
128 x 32
128 x 64
At the origin of the project is the problem of replacing the 128 x 64 plasma screens, used on certain WPC-95 machines.
Indeed, on a WPC-95 like the Phantom Haus (AWP), the plasma screen is a very special model. On the one hand, it has twice the lines of a conventional screen (64 instead of 32) and, on the other hand, its format is much more compact.
The last plasma "dot" screen manufacturer, VISHAY, ended its production at the end of 2020, concerning all products of this technology. Thus, both the standard 128 x 32 screens, as well as the 128 x 64 or even the 192 x 64 are no longer manufactured at all, even on order. For the 128 x 64, the latest model compatible with the original Babcock/Cherry, reference APD-128G064 has become completely untraceable. Storage is no longer provided by distributors and it is illusory to look for second-hand.
Unlike 128 x 32 screens, it is not possible to replace it with a solution based on LED panels. The dot density of this mini-screen is such that there is no equivalent: 1.016 mm! (display area 130 x 65 mm). The thinnest RGB LED panels you can find in 2022, do not still, go below 1.2 mmm.
There was therefore only one alternative left, that of using an LCD screen of the appropriate size (7" being the closest).
"Low-cost" version and 128 x 32
We have chosen to carry out this project, the use of a SiPEED TANG NANO 1K module, integrating a GOWIN GW1NZ-LV1 FPGA. It is an economical solution where everything (or almost!) is already in place (FPC connector for the LCD in particular). It also appeared to us that the physical interface with the video card should be reduced to the bare minimum and that it was necessary to make maximum use of the possibilities offered by the module or the FPGA (buttons, storage in flash memory).
Thus, the number of external components is reduced to its simplest expression. This required some thinking (and made the FPGA architecture more complex), but in the end we gain in simplicity, both for the electronics and for the user.
Although initially planned for 128 x 64 screens, the project has evolved to be able to work with 128 x 32 screens as well. Certainly, it is no longer a question of replacing the original screen, but rather of being able to use an LCD screen as an auxiliary, or for tests.
The goal of the project is not to do dynamic image colorization either! The color screen can simply be used with different palettes of the user's choice.
"Collateral" version PinLCD
The first project completed, it then appeared that the possibility of controlling this display externally would be a plus. For example, using the VPinMame emulator or controlling it with an Arduino. The analysis as well as several tests made it possible to note, that it would be finally more judicious to make a separate project of it.
Simultaneous use of a "physical" interface (2x7 DMD connector) and a "logical" interface (USB/serial connector) being totally improbable, the two cases could be treated separately.
This second project is described on this page: PinLCD
Many tests and experiments were necessary before obtaining a completely stable and functional version. The synthesis of several features was quite laborious, but rich in lessons. The architecture and operation of the FPGA are written in VHDL language.
A 5" screen was mainly used for the development (resolution and operation identical to a 7"). Most features could be tried without connecting a WPC-95 video board. The consumption has been checked, it does not exceed 200 mA in all, including the LCD screen on.
In order to obtain a satisfactory visual effect similar to plasma dots, it is essential to incorporate a separation between each row and each column. To avoid having "square" points, we also round the corners. The frame (unused area of the LCD, around the DMD image) will generally be black, but can also take on a predefined color.
The interface was mounted and tested on a wiring board. The two buttons "A" and "B" have also been moved to this board, in order to avoid having to manipulate the TANG NANO 1K module too much.
An Arduino Nano was used as a signal injector. Although the generated signal is "slow", it is quite consistent with that produced by a WPC-95. This allows testing of DMD reception and video signal compliance functions. Two versions are used, one for the 128 x 32 mode with about twenty images stored in the Arduino, the other for 128 x 64 mode with thirteen frames.
The first 7" LCD screen used for testing was a model delivered in a complete kit (Tang Nano 1K + screen). This reference SH070JPB60 turns out to be much too bright (in any case, much more than the 5" where the images were of better quality). A few tries in 128 x 64 and 128 x 32:
The second 7" screen used is a compatible TKR7040B reference 070B0QZDBEF-40.
This time, the brightness is correct and the image of much better quality.
For more details on the installation and operation of the module, refer to the documentation (multilingual):
It obviously incorporates the DMD signal input connector and the power supply connector (where only the 5V is used). Also included is the SiPEED TANG NANO 1K module with the FPGA. The FPGA uses 3.3V signals while the DMD input is 5V, so a level adjustment must be made. This is achieved by the CD4050 circuit, which at the same time provides protection against overvoltages.
Implementation and realization
The position of the FPC connector and the Kapton cable of the LCD are quite restrictive for the installation of the interface. It is indeed necessary to connect the screen to the module, while keeping access to the buttons and the visibility of the LED. The chosen solution is to fix everything to the back of the LCD, which has the advantage of being very compact. The Kapton cable is immobilized on the back of the LCD by adhesive tape, which protects and insulates it.
The TANG NANO 1K module can thus be plugged in the right way.
A printed circuit was made to implement the interface with the connectors. This one fits perfectly at the bottom of the screen on which it is glued.
The simplicity of the assembly eliminates the need to use a support for the CD4050 and for the TANG NANO 1K module. The latter will not necessarily need to be removable and it can be soldered directly to the PCB using an interconnection strip. This will have the advantage of reducing the height of the assembly and the connection of the PFC band will be all the easier.
Files to program
The GOWIN FPGA programming software requires two files:
- An ".fs" file containing the component's synthesized architecture.
- A ".fi" file for initializing the FPGA flash memory.
For the curious, know that the two ".fs" and ".fi" files are of the "text" type and are perfectly readable with an editor. The ".fi" file contains the definition of the palettes as well as some parameters.
The two ".fs" and ".fi" files are delivered in an archive (.zip) to be unzipped.
128 x 32
800 x 480
128 x 64
800 x 480
This achievement is available for free.